Electronic Design

Embedded Test Complements Boundary Scan

Companies specializing in circuit board and system design-for-test (DFT) tools are pursuing a variety of strategies to serve test and debug applications based on innovations they announced over the ...
Design-Reuse

SynTest Receives "Multiple-capture DFT system for scan-based integrated circuits" Patent for At-Speed Scan/BIST Invention

SAN JOSE, Calif., Oct 19, 2005-- SynTest Technologies, Inc., a leading supplier of Design-for-Test (DFT) tools, was granted 33 claims on Oct. 11, 2005 under United States Patent # 6,954,887 for its ...
Semiconductor Engineering

The Era Of Packetized Scan Test Has Arrived

For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...
Electronic Design

Scan Software Squashes Circuit Test Time

Scan Software Squashes Circuit Test Time Reduced test data volume, test run time, and automatic test equipment (ATE) reloads come via VirtualScan software, which ultimately slashes the cost of ...
EDN

Lowering the Cost of Test with Boundary Scan

The cost of manufacturing printed circuit board assemblies (PCBAs) has always been a concern for original equipment manufacturers (OEM) and contract manufacturers (CM). This is one of the reasons why ...