Quantum-secure NFC and eSIM chip for smartphones and smartwatches

In the tiny ST54M, STMicroelectronics combines two ARM cores with a hardware accelerator for the PQC algorithms ML-KEM (FIPS-203) and ML-DSA (FIPS-204).
IEEE

Design and Analysis of SHA-256 Hash Function Using FPGA for Secure Data Processing

Abstract: Secure Hash Algorithm (SHA) is a set of cryptographic hashing algorithms designed to generate fixed-size output hash value from input data of any size. This paper provide an efficient design ...
IEEE

SHA-256 Hash Generator in Verilog HDL

Abstract: An implementation of SHA-256 hash generator is presented. A block has been described in Verilog HDL. A generator code is written with basic logical and arithmetic operations to create a ...