IEEE

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High-Resolution Encoder Interface

Abstract: Traditional proportional integral derivative (PID) falls short for precise control of DC motor speed under changing conditions. This paper presents a novel FPGA based IP (intellectual ...
Electronic Design

Next-Gen MCUs Target Motor Control and Power Conversion

The PSOC Control C3 microcontrollers developed by Infineon focus on boosting system efficiency, reliability, and flexibility.
IEEE

Implementation of FPGA-based Neural Network Controller for Reducing Speed Ripple for a PMSM-driven EV using MRAS Speed Estimator

Abstract: The conventional model reference adaptive system (MRAS) employs a proportional-integral (PI) controller with a low-pass filter (LPF). However, the LPF and integrator add phase delay and DC ...