GitHub

FPGA Chrome Dino Game

A hardware implementation of the Google Chrome Dino game on the DE1-SoC FPGA using SystemVerilog. The game recreates the classic offline Chrome Dino experience entirely in hardware with VGA graphics, ...
IEEE

FPGA Implementation of PoolFormer Network Using Python-Driven High-Level Synthesis Framework for Edge-AIoT Speech Recognition

Abstract: This brief presents an edge-AIoT speech recognition system, which is based on a new spiking feature extraction (SFE) method and a PoolFormer (PF) neural network optimized for implementation ...
IEEE

FPGA Based AI Inference Accelerator for Low-End Embedded Systems

Aim: This research aims to develop a hardware accelerator to inference AI models for low-end embedded platforms using FPGAs as they are reconfigurable, have parallel and real-time processing ...